FPGA-based many-core System-on-Chip design

Optimization of Test and Design-for-Testability Solutions for Many-Core System-on-Chip Designs

Optimization of Test and Design-for-Testability Solutions for Many-Core System-on-Chip Designs

On-chip Network-enabled Many-core Architectures

Embedded 3D Graphics Core for FPGA-based System-on-Chip Applications

This paper presents a 3D graphics accelerator core for an FPGA based system, and illustrates how to build a System-on-Chip containing a Xilinx MicroBlaze soft-core CPU and our 3D graphics accelerator core. The system is capable of running uClinux and hardware accelerated 3D graphics applications such as a VRML viewer. The 3D graphics core is connected to a PLB 64-bit on-chip bus, and can render...

Embedded Intelligence on Chip: Some FPGA- based design experiences

The following FPGA-based (Field Programmable Gate Array) experiences stem from a broader line of research investigating methodologies for scaling cognitive/intelligent architectures into limited-resource implementations. Some of these architectures were designed for solving problems involving abstract concepts and uncertain environments, without regarding resource requirements: their original i...

FPGA-Based WiMAX System Design